It is increasingly being endeavored to produce integrated circuits for radiofrequency applications with pure complementary MOS, metal oxide semiconductor, circuit technology rather than bipolar circuit technology or so-called BiCMOS circuit technology to achieve higher integration densities and more cost-effective mass production.
Frequency dividers are normally constructed with toggle flip-flops. A toggle flip-flop generally corresponds to a D-type flip-flop whose inverting output is fed back to its D input. Toggle flip-flops are bistable digital circuits which switch over their output level from low to high or from high to low with each input clock. Consequently, the input frequency is divided by two.
In large scale integrated radiofrequency modules in which frequency dividers are to be used to divide down a frequency provided by an integrated oscillator in the gigahertz range, differential signal processing is normally required or at least advantageous. The oscillator usually requires a symmetrical and, as far as possible, purely capacitive load.
Moreover, it is desirable for the output signal of the frequency divider to have a symmetrical duty ratio. This means that the duration of the high level and the duration of the low level of the output signal are of the same length.
As the integration density increases, integrated semiconductor circuits are also intended to be suitable for ever smaller supply voltages. Therefore, a further requirement made of an integrated flip-flop circuit arrangement is a small number of transistor stages or other components stacked one above the other between a supply potential terminal and a reference potential terminal.
Furthermore, it is desirable to keep the number of internal circuit nodes as small as possible within the flip-flop circuit, in order to reduce the capacitive load. At high clock frequencies, in particular, capacitive, parasitic loads have to be continually subjected very rapidly to charge reversal.